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general description the max9939 is a general-purpose, differential-input programmable-gain amplifier (pga) that is ideal for con- ditioning a variety of wide dynamic range signals such as those found in motor current-sense, medical instru- mentation, and sonar data acquisition applications. it features spi-programmable differential gains from 0.2v/v to 157v/v, input offset-voltage compensation, and an output amplifier that can be configured either as a high-order active filter or to provide a differential output. the pga is optimized for high-signal bandwidth and its gain can be programmed to be 0.2v/v, 1v/v, 10v/v, 20v/v, 30v/v, 40v/v, 60v/v, 80v/v, 119v/v, and 157v/v. precision resistor matching provides extremely low gain tempco and high cmrr. although the max9939 oper- ates from a single supply v cc between 2.9v to 5.5v, it can process signals both above and below ground due to the use of an input level-shifting amplifier stage. furthermore, its inputs are protected to ?6v, allowing it to withstand fault conditions and signal overranges. the output amplifier is designed for high bandwidth and low-bias currents, making it ideal for use in multi- ple-feedback active filter topologies that offer much higher qs and stopband attenuation than sallen-key architectures. the max9939 draws 3.4ma of quiescent supply current at 5v, and includes a software-programmable shut- down mode that reduces its supply current to only 13?. the max9939 is available in a 10-pin ?ax package and operates over the -40? to +125? auto- motive temperature range. applications sensorless motor control medical signal conditioning sonar and general purpose data acquisition differential to single-ended conversion differential-input, differential-output signal amplification sensor interface and signal processing features spi-programmable gains: 0.2v/v to 157v/v extremely low gain tempco integrated amplifier for r/c programmable active filter input offset-voltage compensation input protection to ?6v 13 a software shutdown mode -40? to +125? operating temperature range 10-pin max package max9939 spi programmable-gain amplifier with input v os trim and output op amp ________________________________________________________________ maxim integrated products 1 19-4329; rev 2; 12/10 ordering information part temp range pin-package max9939aub+ -40? to +125? 10 ?ax for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim's website at www.maxim-ic.com. + denotes a lead(pb)-free/rohs-compliant package. functional diagram appears at end of data sheet. spi is a trademark of motorola, inc. ?ax is a registered trademark of maxim integrated products, inc. 1 2 3 4 5 10 9 8 7 6 v cc outa inb ina- gnd din sclk max9939 max top view outb ina+ cs + pin configuration
max9939 spi programmable-gain amplifier with input v os trim and output op amp 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd ..............................................................-0.3v to +6v inb, outa, outb, sclk, din, cs ............-0.3v to (v cc + 0.3v) ina+, ina- to gnd ..................................................-16v to +16v output short-circuit current duration........................continuous continuous input current into any terminal.....................?0ma continuous power dissipation (t a = +70?) 10-pin ?ax (derate 5.6mw/? above +70?) ...........707mw operating temperature range .........................-40? to +125? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? soldering temperature (reflow) .......................................+260? electrical characteristics (v cc = 5v, v gnd = 0v, v ina+ = v ina- , gain = 10v/v, r outa = r outb = 1k ? to v cc /2, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units pga characteristics gain error ge t a = +25 c, 0.2v v outa v cc - 0.2v 0.05 0.38 % gain temperature-coefficient tc-ge 2.2 17 ppm/ c with no v os trim, t a = +25 c 1.5 9 input offset voltage (note 2) v os-a with no v os trim, t a = t min to t max 15 mv input offset-voltage drift 10 ?/c input offset-voltage trim range ?7 mv input common-mode range v cm guaranteed by cmrr test (note 3) -v cc /2 v cc - 2.2 v -1v v cm v cc - 2.2v 50 60 -v cc /2 v cm v cc - 2.2v, t a = +25 c5060 common-mode rejection ratio cmrr -v cc /2 v cm v cc - 2.2v 39 db output short-circuit current i sc 70 ma input-voltage noise density v n f = 10khz, gain = 157v/v 54 nv / hz gain = 0.2v/v gain = 1v/v 2.15 gain-bandwidth product gbw gain = 157v/v 279 mhz slew rate sr 9 v/? settling time t s to 1%, 2v output step 0.45 ? distortion thd f = 1khz, v outa = 2.5v p-p 89 db max capacitive load c l ( max ) 1nf output swing v oh , v ol voltage output high = v cc - v outa , voltage output low = v outa - v gnd 25 60 mv output amplifier characteristics input bias current ib (note 4) 1 pa t a = +25 c 1.5 9 input offset voltage (note 2) v os-b t a = t min to t max 15 mv output short-circuit current i sc 70 ma
max9939 spi programmable-gain amplifier with input v os trim and output op amp _______________________________________________________________________________________ 3 note 1: all devices are 100% production tested at t a = +25?. temperature limits are guaranteed by design. note 2: the input offset voltage includes the effects of mismatches in the internal v cc /2 resistor dividers. note 3: for gain of 0.25v/v, the input common-mode range is -1v to v cc - 2v. note 4: the input current of a cmos device is too low to be accurately measured on an ate and is typically on the order of 1pa. note 5: parts are functional with f sclk = 10mhz. electrical characteristics (continued) (v cc = 5v, v gnd = 0v, v ina+ = v ina- , gain = 10v/v, r outa = r outb = 1k ? to v cc /2, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units unity-gain bandwidth ugbw 2.2 mhz slew rate sr 6.4 v/? settling time t s to 1%, 2v output step 0.86 ? input-voltage noise density v n 36 nv / hz distortion thd f = 1khz, v outa = 2.5v p-p , gain = -1v/v 90 db max capacitive load c l ( max ) 1nf output swing v oh , v ol voltage output high = v cc - v outb , voltage output low = v outb - v gnd 25 60 mv power supply supply voltage range v cc guaranteed by psrr 2.9 5.5 v power-supply rejection ratio psrr 1k ? between outa and inb, 1k ? between outb and inb, measured differentially between outa and outb 60 80 db supply current i cc outa and outb unloaded 3.4 6.7 ma shutdown supply current i shdn soft shutdown through spi 13 24 ? spi characteristics input-voltage low v il 0.8 v v cc = 5v 2.0 input-voltage high v ih v cc = 3.3v 1.65 v input leakage current i in ? ? input capacitance c in 5pf spi timing characteristics sclk frequency f sclk (note 5) 5 mhz sclk period t cp 200 ns sclk pulse-width high t ch 80 ns sclk pulse-width low t cl 80 ns cs fall to sclk rise setup t css 80 ns cs fall to sclk rise hold t csh 20 + (0.5 x t cp ) ns din to sclk setup t ds 55 ns din hold after sclk t dh 0ns sclk rise to cs fall delay t cs0 20 ns cs rise to sclk rise hold t cs1 80 ns cs pulse-width high t csw 200 ns
max9939 spi programmable-gain amplifier with input v os trim and output op amp 4 _______________________________________________________________________________________ cs t cso t css t cl t ch t dh t ds t cp t csh t csw t cs1 sclk din figure 1. spi interface timing diagram typical operating characteristics (v cc = 5v, v gnd = 0v, v in+ = v in- = 0v, gain = 10v/v, r outa = r outb = 1k ? to v cc /2, t a = +25?, unless otherwise noted.) pga gain vs. frequency max9939 toc01 frequency (mhz) gain (db) 1 0.1 10 -60 -40 -20 0 20 40 60 -80 0.01 100 r l = 10k ? to v cc /2 pga gain vs. frequency max9939 toc02 frequency (mhz) gain (db) 1 0.1 -3 -2 -1 0 1 2 3 -4 0.01 10 1v/v gain 157v/v r l = 10k ? to v cc /2 gain = 160v/v gain =30v/v amplifier b gain vs. frequency max9939 toc03 frequency (mhz) gain (db) 1 0.1 10 -60 -40 -20 0 20 40 60 -80 0.01 100 r l = 10k ? to v cc /2 amplifier b gain vs. frequency max9939 toc04 frequency (mhz) gain (db) 1 0.1 -3 -2 -1 0 1 2 3 -4 0.01 10 r l = 10k ? to v cc /2 common-mode rejection ratio vs. frequency max9939 toc05 frequency (mhz) cmrr (db) 10 1 0.01 0.1 -70 -60 -50 -40 -30 -20 -10 0 -80 0.001 100 1v/v gain 157v/v gain error vs. temperature max9939 toc06 temperature ( c) gain error (%) 110 95 80 65 50 35 20 5 -10 -25 0.05 0.10 0.15 0.20 0 -40 125
max9939 spi programmable-gain amplifier with input v os trim and output op amp _______________________________________________________________________________________ 5 typical operating characteristics (continued) (v cc = 5v, v gnd = 0v, v in+ = v in- = 0v, gain = 10v/v, r outa = r outb = 1k ? to v cc /2, t a = +25?, unless otherwise noted.) input v os vs. temperature max9939 toc07 temperature ( c) offset (mv) 110 95 80 65 50 35 20 5 -10 -25 0.5 1.0 1.5 2.0 2.5 3.0 0 -40 125 1ms/div input v os trim response outa 10mv/div max9939 toc08 gain = 1v/v differential psrr vs. frequency max9939 toc09 frequency (khz) psrr (db) 100 1 -80 -60 -40 -20 0 -100 0.01 10,000 10 0.1 1000 10v/v gain 157v/v total harmonic distortion vs. frequency max9939 toc10 frequency (khz) distortion (db) 0.1 10 -100 -80 -60 -40 -20 0 -120 0.01 100 1 1v/v gain 157v/v gain = 1v/v gain = 157v/v noise voltage density max9939 toc11 frequency (hz) noise density (nv/ hz ) 100 10,000 1000 100 10,000 10 10 100,000 1000 pga 10v/v gain 157v/v noise voltage density max9939 toc12 frequency (hz) noise density (nv/ hz ) 100 10,000 100 1000 10 10 100,000 1000 amplifier b
max9939 spi programmable-gain amplifier with input v os trim and output op amp 6 _______________________________________________________________________________________ 1 s/div recovery from input overload (pga, gain = 1v/v) ina+ - ina- 2v/div max9939 toc15 outa 1v/div 400ns/div recovery from input overload (pga, gain = 157v/v) ina+ - ina- 2mv/div max9939 toc16 outa 1v/div 1 s/div recovery from input overload (output amplifier) in 2v/div max9939 toc17 outb 2v/div 200 s/div gain adjust response ina+ - ina - 2mv/div max9939 toc18 outa 1v/div gain = 157v/v gain = 40v/v gain = 10v/v gain = 1v/v typical operating characteristics (continued) (v cc = 5v, v gnd = 0v, v in+ = v in- = 0v, gain = 10v/v, r outa = r outb = 1k ? to v cc /2, t a = +25?, unless otherwise noted.) 0 200 100 400 300 600 500 700 900 800 1000 04060 20 80 100 120 140 160 1% settling time vs. gain (pga) max9939 toc14 gain (v/v) settling time (ns) v out = 2v p-p output impedance vs. frequency max9939 toc13 frequency (mhz) impedance ( ? ) 1 0.1 0.01 0.1 1 10 100 0.01 0.001 10 amplifier b
max9939 spi programmable-gain amplifier with input v os trim and output op amp _______________________________________________________________________________________ 7 detailed description the max9939 is a general-purpose pga with input off- set trim capability. its gain and input offset voltage (v os ) are spi programmable. the device also includes an uncommitted output operational amplifier that can be used as either a high-order active filter or to provide a differential output. the device can be put into shut- down through spi. the gain of the amplifier is programmable between 0.2v/v and 157v/v. the input offset is programmable between ?7mv and can be used to regain output dynamic range in high gain settings. an input offset-volt- age measurement mode enables input offset voltage to be calibrated out in firmware to obtain excellent dc accuracy. the main amplifier accepts a differential input and pro- vides a single-ended output. the relationship between the differential input and singled-ended output is given by the representative equation: v outa = v cc /2 + gain x (v ina+ - v ina- ) + gain x v os architecture the max9939 features three internal amplifiers as shown in the functional diagram . the first amplifier (amplifier lvl) is configured as a differential amplifier for differential to single-ended conversion with an input offset-voltage trim network. it has extremely high typical operating characteristics (continued) (v cc = 5v, v gnd = 0v, v in+ = v in- = 0v, gain = 10v/v, r outa = r outb = 1k ? to v cc /2, t a = +25?, unless otherwise noted.) pin description pin name function 1 sclk serial-clock input 2 din serial-data input. data is clocked into the serial interface on the rising edge of sclk. 3 gnd ground 4 ina- pga inverting input 5 ina+ pga noninverting input 6 outb buffer output 7 inb buffer input 8 outa pga output 9v cc power supply. bypass to gnd with 0.1? and 1? capacitors. 10 cs acti ve- low c hi p - s el ect inp ut. d r i ve cs l ow to enab l e the ser i al i nter face. d r i ve cs hi g h to d i sab l e the ser i al i nter face. 200 s/div common-mode rejection response ina+ 1v/div ina- 1v/div max9939 toc19 outa 2v/div v cm = 1v p-p , 1khz v dm = 25mv p-p , 10khz gain = 157v/v shutdown current vs. supply voltage max9939 toc20 voltage (v) shutdown current ( a) 3.6 4.0 16 20 8 4 12 0 2.8 3.2 4.8 5.2 4.4
max9939 spi programmable-gain amplifier with input v os trim and output op amp 8 _______________________________________________________________________________________ cmrr, gain accuracy, and very low temperature drift due to precise resistor matching. the output of this amplifier is level shifted to v cc /2. this amplifier is followed by a programmable-gain inverting amplifier (amplifier a) with programmable r f and r i resistors whose gain varies between 0.2v/v and 157v/v. the output of this amplifier is biased at v cc /2 and has extremely high gain accuracy and low temperature drift. the max9939 has an uncommitted op amp (amplifier b) whose noninverting input is referenced to v cc /2. its inverting input and output are externally accessible, allowing it to be configured either as an active filter or as a differential output. a robust input esd protection scheme allows input volt- ages at ina+ and ina- to reach ?6v without damag- ing the max9939, thus making the part extremely attractive for use in front-ends that can be exposed to high voltages during fault conditions. in addition, its input-voltage range extends down to -v cc /2 (e.g., -2.5v when powered from a 5v single supply) allowing the max9939 to translate below ground signals to a 0v to 5v output signal. this feature simplifies interfacing ground-referenced signals with unipolar-input adcs. spi-compatible serial interface the max9939 has a write-only interface, consisting of three inputs: the clock signal (sclk), data input (din), and chip-select input ( cs ). the serial interface works with the clock polarity (cpol) and clock phase (cpha) both set to 0 (see figure 1). initiating a write to the max9939 is accomplished by pulling cs low. data is clocked in on the rising edge of each clock pulse, and is written lsb first. each write to the max9939 consists of 8 bits (1 byte). pull cs high after the 8th bit has been clocked in to latch the data and before sending the next byte of instruction. note that the internal register is not updated if cs is pulled high before the falling edge of the 8th clock pulse. register description the max9939 consists of three registers: a shift register and two internal registers. the shift register accepts data and transfers it to either of the two internal regis- ters. the two internal registers store data that is used to determine the gain, input offset voltage, and operating modes of the amplifier. the two internal registers are the input v os trim register and gain register. the format of the 8-bit write to these registers is shown in tables 1 and 2. data is sent to the shift register lsb first. sel: the sel bit selects which internal register is writ- ten to. set sel to 0 to write bits d5:d1 to the input v os trim register. set sel to 1 to write d4:d1 to the gain register (d5 is don? care when sel = 1). cs sclk din d0 d1 d2 d3 d6 d5 d6 d7 figure 2. spi interface timing diagram (cpol = cpha = 0) d7 msb d6 d5 d4 d3 d2 d1 d0 lsb shdn meas v4 v3 v2 v1 v0 sel = 0 table 1. input v os trim register d7 msb d6 d5 d4 d3 d2 d1 d0 lsb shdn meas x g3 g2 g1 g0 sel = 1 x = don? care. table 2. gain register
max9939 spi programmable-gain amplifier with input v os trim and output op amp _______________________________________________________________________________________ 9 shdn: set shdn to 0 for normal operation. set shdn to 1 to place the device in a low-power 13? shutdown mode. in shutdown mode, the outputs outa and outb are high impedance, however, the spi decode circuitry is still active. each instruction requires a write to the shdn bit. meas: the max9939 provides a means for measuring its own input offset voltage. when meas is set to 1, the ina- input is disconnected from the input signal path and internally shorted to ina+. this architecture thus allows the input common-mode voltage to be compen- sated at the application-specific input common-mode voltage of interest. the input offset voltage of the pga is the output offset voltage divided by the programmed gain without any v os trim (i.e., v3:v0 set to 0): v os-inherent = (v outa - v cc /2)/gain program v os to offset v os-inherent . the input v os also includes the effect of mismatches in the resistor- dividers. setting meas to 0 switches the inputs back to the signals on ina+ and ina-. each instruction requires a write to the meas bit. programming gain the pga? gain is set by the bits g3:g0 in the gain reg- ister. table 3 shows the relationship between the bits g3:g0 and the amplifier? gain. the slew rate and small-signal bandwidth (ssbw) of the pga depend on its gain setting as shown in table 3. programming input offset voltage (v os ) the input offset voltage is set by the bits v4:v0 in the input offset voltage trim register. bit v4 determines the polarity of the offset. setting v4 to 0 makes the offset positive, while setting v4 to 1 makes the offset negative. table 4 shows the relationship between v3:v0 and v os . to determine the effect of v os at the output of the ampli- fier for gains other than 1, use the following formula: v outa = v cc /2 + gain x (v os-inherent + v os ) where v os-inherent is the inherent input offset voltage of the amplifier, which can be measured by setting meas to 1. applications information use of output amplifier as active filter the output amplifier can be configured as a multiple- feedback active filter as shown in figure 3, which tradi- tionally has better stopband attenuation characteristics than sallen-key filters. these filters also possess inher- ently better distortion performance since there are no common-mode induced effects (i.e., the common- mode voltage of the operational amplifier is always fixed at v cc /2 instead of it being signal dependent such as in sallen-key filters). choose external resistors and capacitors to create lowpass, bandpass, or high- pass filters. g3:g0 gain (v/v) slew rate (v/?) small-signal bandwidth (mhz) 0000 1 2.90 2.15 0001 10 8.99 2.40 0010 20 8.70 1.95 0011 30 12.80 3.40 0100 40 12.50 2.15 0101 60 13.31 2.60 0110 80 12.15 1.91 0111 120 18.53 2.30 1000 157 16.49 1.78 0.2 (v cc = 5v) 1001 0.25 (v cc = 3.3v) 2.86 1.95 1010 1 2.90 2.15 table 3. gain
max9939 spi programmable-gain amplifier with input v os trim and output op amp 10 ______________________________________________________________________________________ differential-input, differential-output pga the output amplifier can be configured so that the max9939 operates as a differential-input, differential- output programmable gain amplifier. as shown in figure 4, use a 10k ? resistor between outa and inb, and between inb and outb. such a differential-output configuration is ideal for use in low-voltage applications that can benefit from the 2x output voltage dynamic range when compared to single-ended output format. use of output operational amplifier as tia cmos inputs on the output op amp makes it ideal for use as an input transimpedance amplifier (tia) in cer- tain current-output sensor applications. in such a situ- ation, keep in mind that the inverting input operates at fixed voltage of v cc /2. use a high-value resistor as a feedback gain element, and use a feedback capacitor in parallel with this resistor if necessary to aid amplifi- er stability in the presence of high photodiode or cable capacitance. the output of this tia can be rout- ed to ina+ or ina- for further processing and signal amplification. power-supply bypassing bypass v cc to gnd with a 0.1? capacitor in parallel with a 1? low-esr capacitor placed as close as possi- ble to the max9939. input offset voltage (v4 = 0 trims positive, v4 = 1 trims negative) v3:v0 v os (mv) 0000 0 0001 1.3 0010 2.5 0011 3.8 0100 4.9 0101 6.1 0110 7.3 0111 8.4 1000 10.6 1001 11.7 1010 12.7 1011 13.7 1100 14.7 1101 15.7 1110 16.7 1111 17.6 table 4. input offset-voltage trim
max9939 spi programmable-gain amplifier with input v os trim and output op amp ______________________________________________________________________________________ 11 r i a v cc v cc /2 20k ? 20k ? v cc v cc /2 220pf 20k ? 20k ? lvl v cc v cc /2 20k ? 20k ? 10k ? 10k ? 10k ? ina+ ina- 66.5k ? 66.5k ? 100nf 4.7nf b 121k ? 1.21k ? adc r f outa inb outb asic cs dout sclk sclk spi registers gnd din cs 0.1 f 1 f v cc gain shutdown input offset- voltage trim max9939 figure 3. using the max9939 output amplifier as an anti-aliasing filter (corner frequency = 1.3khz) to maximize nyquist bandwid th
max9939 spi programmable-gain amplifier with input v os trim and output op amp 12 ______________________________________________________________________________________ r i a v cc v cc /2 20k ? 20k ? v cc v cc /2 20k ? 20k ? lvl v cc v cc /2 20k ? 20k ? 10k ? 10k ? 10k ? ina+ ina- 10k ? 10k ? b adc r f outa inb outb asic cs dout sclk sclk spi registers gnd din cs 0.1 f 1 f v cc gain shutdown input offset- voltage trim max9939 figure 4. using the max9939 as a differential-input, differential-output pga chip information process: bicmos
max9939 spi programmable-gain amplifier with input v os trim and output op amp ______________________________________________________________________________________ 13 r i a v cc v cc /2 20k ? 20k ? v cc v cc /2 20k ? 20k ? lvl v cc v cc /2 20k ? 20k ? 10k ? 10k ? 10k ? ina+ ina- b r f sclk spi registers gnd din cs v cc gain shutdown input offset- voltage trim max9939 outa inb outb functional diagram
max9939 spi programmable-gain amplifier with input v os trim and output op amp 14 ______________________________________________________________________________________ 10lumax.eps package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to th e package regardless of rohs status. package type package code outline no. land pattern no. 10 ?ax u10+2 21-0061 90-0330
max9939 spi programmable-gain amplifier with input v os trim and output op amp maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 15 2010 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 11/08 initial release 1 2/09 corrected gain value in table 3 9 2 12/10 modified figure 2 8

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